1. Field of the Invention
The present invention relates to a semiconductor memory device and a control method of the semiconductor memory device, which are applied to, for instance, a NAND flash memory.
2. Description of the Related Art
In recent years, a demand for nonvolatile memories has been increasing in accordance with an increase in memory capacity thereof. A NAND flash memory is an example of such nonvolatile memories (see, e.g. Jpn. Pat. Appln. KOKAI Publication No. 11-176175).
When a write operation is executed in the NAND flash memory, for example, a write voltage Vpgm is gradually stepped up from, e.g. a “1” threshold voltage distribution and is applied, and a plurality of pulses are applied until reaching a target “0” threshold voltage distribution. In this case, the initial value α of the write voltage Vpgm and the step-up width ΔVpgm are determined when a diesort test is performed, and are fixed. Thus, after the diesort test, the initial value α of the write voltage Vpgm and the step-up width ΔVpgm are, in principle, invariable.
However, if the number of times of rewrite of write/erase operations increases, the characteristics of a memory cell vary, the write speed increases and the necessary number of pulses decreases. For example, over-program occurs by the first pulse. On the other hand, since the initial value α of the write voltage Vpgm and the step-up width ΔVpgm are fixed, over-program cannot be prevented even if the characteristics of the memory cell vary and the number of pulses decreases.
The memory cell, in which over-program has occurred, becomes a defective element with a write defect.